Mentor Graphics Corporation and the Microprocessor Research and Development Center (MPRC) of Beijing University recently announced the opening of the first system-on-chip (SoC) verification training Center in China.

The training facility focuses on training both domestic and overseas engineers to resolve the simulation and verification issues associated with ultra large-scale ASIC designs. Recognizing the essential nature of emulation technology in verifying multimillion gate SoC designs, the center is introducing the Mentor Graphics VStation PRO emulator, a product capable of modeling the performance of the largest ASIC designs in real-time. The center is accredited as the only training site in China to provide regular training on emulation technology.

By collaborating with the MPRC on emulation technology, Mentor Graphics continues a long-standing technology relationship with the university. The MPRC has also applied design-for-test (DFT), IC physical verification, FPGA design and high-speed PCB tools for applications in areas including microprocessor design and verification to hardware and software co-design. The VStationPRO is the most advanced ASIC verification technology to be deployed by the center with the tool's ability to simulate and debug designs ranging from millions to tens of million of gates. The system is able to dramatically reduce the time spent verifying a device's performance.


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